DRAM Engineer
Company | Solidigm |
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Location | Rancho Cordova, CA, USA |
Salary | $Not Provided – $Not Provided |
Type | Full-Time |
Degrees | Bachelor’s, Master’s |
Experience Level | Junior, Mid Level |
Requirements
- Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering or related discipline.
- Minimum 1 year of experience in the following areas.
- Strong understanding of DRAM architecture, operation and integration. Proficiency with memory testing tools and software.
- Have specific knowledge for DRAM initialization, training, ECC, refresh, and power states.
- Knowledge of signal integrity, high speed signal fundamentals and simulation techniques.
- Hands-on experience with lab tools such as oscilloscopes, power supplies and soldering equipment.
- Good analytical skills and ability to understand and communicate complex concepts.
- Strong planning and documentation skills.
- Good communication, interpersonal and problem-solving skills.
- Strong HW or FW project management and leadership skills.
- Able to effectively work independently and in a team environment.
Responsibilities
- Develop, validate and integrate DRAM driver for SSD FW platform
- Understand DRAM IP on the controller side and develop and validate read, write, Gate trainings and Write levelling
- Have or develop expertise in DRAM PHY IP and configure it
- Have or develop expertise in DRAM ECC
- Have or develop expertise in DDR4 and DDR5 protocols
- Configure DDR4/DDR5 mode registers and validate those register settings
- Develop and validate DDR4/DDR5 initialization
- Develop and validate DDR power states and refresh policy
- Develop test procedures and tools for DRAM validation and debugging
- Build and maintain close relationships with internal and external teams
- Provide technical expertise to cross-functional teams
- Document requirements and track schedules related to each product
- Guide debug effort to resolve DRAM issues
Preferred Qualifications
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No preferred qualifications provided.