Analog Mixed-Signal Design Engineer

MS in Electrical Engineering or Computer Engineering with 10+ years of experience in advanced node CMOS high speed analog and mixed signal development or PhD in Electrical Engineering or Computer Engineering with 7+ years of experience in advanced node CMOS high speed analog and mixed signal development
Recent design ownership in 5nm and 3nm technologies
Experience in designing low jitter, low power PLL, VCO and clocking circuitry in advanced CMOS nodes
Deep understanding of advanced clock distribution techniques such as resonant and traveling wave clocking
Proficiency in electromagnetic tools like EMX or similar
Experience in assessing design bugs and recommending fixes or workarounds to balance technical requirements with schedule
Experience in design management with detailed knowledge of development methodologies, design flows including EDA integration, foundry PDK and associated collaterals
Deep understanding of signal integrity and power integrity for high-speed designs
Good understanding of design tape-out to foundries and solid understanding of supply chain for ASIC product development
Excellent knowledge/experience with TSMC 7nm-5nm, i.e. understanding of power consumptions, area, estimated design and layout efforts for digital and analog blocks, technology limitations

No responsibilities provided.

System knowledge of current generation and next generation of silicon photonics-based transceiver architectures and standards is highly desirable
It is desirable if the candidate has a good understanding of advanced packaging (2.5D / 3D) architectures
Strong written and verbal communication skills, with the specific ability to speak to various technical and management levels
Proactive, collaborative and creative approach to innovation, technical development and consensus facilitation to influence optimal project results
Excellent time and task management, and interpersonal skills
Willingness to travel when required