Analog Mixed Signal IC Design Engineer. Senior Staff
| Company | Marvell |
|---|---|
| Location | Toronto, ON, Canada |
| Salary | $Not Provided – $Not Provided |
| Type | Full-Time |
| Degrees | Master’s, PhD |
| Experience Level | Senior |
Requirements
- Master’s degree with 5+ years of related professional experience and/or PhD in Electrical Engineering with 3+ years of experience
- Experience in high speed analog mixed signal design in 7nm and below for TSMC process
- PAM4, 56G or 112G SerDes Design experience highly desired
- Demonstrable knowledge of high performance SerDes development
- Demonstrable team player and works well in a collaborative environment
Responsibilities
- Leading the high-speed and high performance SerDes development in advanced technology nodes, 5nm, 3nm and beyond
- Design IP that includes but not limited to 112G/56G PAM4; 32G PAM2; DDR; Die-to-Die High Speed Interconnect; System PLL IPs
- Participate in the SerDes architecture development with the DSP, Analog and Digital design teams
- Provide the instructions to the layout engineers
- Working with the AE for the IP characterization and validation plan
- Supporting IP Lab characterization and debugging
- Product and customer supporting
Preferred Qualifications
- Project leading and SOC support is preferred
- Strives to make others better