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Analog Mixed Signal IP Post Silicon Validation
| Company | Apple |
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| Location | Cupertino, CA, USA |
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| Salary | $143100 – $264200 |
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| Type | Full-Time |
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| Degrees | Bachelor’s |
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| Experience Level | Mid Level |
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Requirements
- BSEE and 3+ years related industry experience
Responsibilities
- Leading efforts to bring up, validate, and characterize high-speed SerDes blocks.
- Possessing hands-on experience with various high-speed SerDes architectures, including NRZ and PAM, as well as associated protocols.
- Demonstrating in-depth knowledge of crucial SerDes blocks such as CTLE, DFE, FFE, CDR, and PLLs, along with their characterization and debugging processes.
- Being proficient in using test and measurement equipment like high-speed oscilloscopes and BERTs.
- Understanding SerDes adaptation techniques.
- Experience analyzing SerDes signal integrity.
- Experience with high-speed protocols such as USB, PCIe, DP, etc.
- Exhibiting strong debugging and problem-solving skills, with data investigation and mining expertise.
- Developing robust test methodologies to evaluate performance and calculate high-speed serial interfaces (SerDes) operating margins across PVT variations.
- Supporting ATE and Product Engineering
Preferred Qualifications
- MSEE
- Hands on SerDes Lab experience
- Python programming experience
