Analog Mixed Signal IP Post Silicon Validation – DDR Memory

Analog Mixed Signal IP Post Silicon Validation – DDR Memory

Requirements

• BSEE / BSECE and 3 or more years’ experience.

Responsibilities

• Bench test, bring-up, debug, and characterization of DDR Memory for SoC’s
• Development of benchtop electrical tests exercising on-chip circuitry through a combination of FPGA, JTAG, SPI, and analog interfaces
• Drafting & Execution of scripts to automate tests, extract results, and generate reports using database and analytical tools
• Generating reports for characterization and/or debugging to provide design feedback
• In-system PI/SI measurements for correlation with simulation models
• Collaborating with cross functional teams including Design, System HW, and SW
• Supporting ATE and Product Engineering for Inter-operability tests

Preferred Qualifications

• Experience in DDR Memory test development, debug, and characterization
• Familiar with JEDEC Specifications at Electrical & Protocol levels
• Strong fundamental understanding of DDR PHY circuitry in DLLs, I/O, and Calibration
• Familiar with signal integrity concepts in probing memory bus signals
• Proficient in lab instruments such as Oscilloscope, Spectrum Analyzer, Pattern Generator, Logic Analyzer, etc., with good understanding of their working principles
• Experienced in scripting language, Python preferred, to automate test and analyze data
• Detail-oriented & Emphasis on quality of results
• Initiative in taking ownership & responsibility to drive deliverables
• Strong verbal and written communication skills
• Hands-on lab experience including soldering/instrumenting systems