ASIC Design Engineer

ASIC Design Engineer

Requirements

• BS (or equivalent experience) in Electrical Engineering, Computer Engineering, or a related degree required; advanced degrees (MS, PhD) are a plus.
• 3+ years of relevant proven experience and a background in logic design, Verilog and/or System-Verilog, with a good understanding of Computer Architecture and Digital Systems design.
• Experience with multiple clock domains and asynchronous interfaces.
• Experience in low power design and low power architecture.
• Knowledge of DRAM controllers is a plus.
• Experience with all stages in the ASIC design flow including emulation, prototyping, DFT, timing analysis, floor planning, ECO, bringup & lab debug, and ATE test development.
• Strong working knowledge of Verilog or VHDL.
• Familiarity with board and system-level issues.
• Programming skills in C and/or PERL.
• Good communication skills and interpersonal skills are required.

Responsibilities

• Responsible for the micro-architecture and design implementation of Tegra SOC memory subsystem modules.
• Collaborate with architects, software engineers, and circuit designers to deliver a world-class solution.
• Responsible for the micro-architecture and design including RTL design, synthesis, functional verification, and timing analysis using innovative CAD tools and the latest process technologies.

Preferred Qualifications

• Knowledge of industry specifications like CHI/AXI/CXL/PCI-E is a plus.
• Experience with RISCV Scalar, RISCV Vector, or ARM Processors is a plus.
• A history of mentoring junior engineers and interns is a huge plus.