CAD/Eda – Silicon Design/Verification Infrastructure
| Company | PDDN |
|---|---|
| Location | Santa Clara, CA, USA |
| Salary | $Not Provided – $Not Provided |
| Type | Full-Time |
| Degrees | |
| Experience Level | Senior |
Requirements
- 5+ years of experience in EDA/CAD SoC/IP design or verification infrastructure development
- Proficient in Python (3.x)
- Proficient in System Verilog/UVM
- Experience with Linux scripting
- Expertise in SoC design/verification flows
Responsibilities
- Integration testing
- Design verification
- Collaborating with cross-functional teams to drive quality and innovation
Preferred Qualifications
-
No preferred qualifications provided.