DFX Methodology Engineer

DFX Methodology Engineer

Requirements

• BSEE or equivalent experience with 3+ years of experience
• MSEE (or PhD) with proven experience in DFT or related domains
• Excellent analytical skills in verification and validation of test patterns and logic on complex and multi-million gate designs using vendor tools
• Good exposure to cross functional areas including RTL & clocks design, STA, place-n-route and power, to ensure we are making the right trade-offs
• Experience in Silicon debug and bring-up on the ATE with an understanding of pattern formats, failure processing, and test program development
• Knowledge of DFT security and hardware system security is a plus

Responsibilities

• Own and work with cross functional teams, implementing state-of-the-art designs in test access mechanisms, I1149.1, I1500, I1687, IO BIST, memory BIST, scan and array dump and DFX security methodology
• Help develop and deploy DFT methodologies for next generation products
• Help mentor junior engineers on test designs and trade-offs including cost and quality

Preferred Qualifications

• Strong programming and scripting skills in Perl, Python or Tcl desired
• Exceptional written and oral interpersonal skills with the curiosity to work on rare challenges