EDA Tools Hardware Engineer
| Company | Intel |
|---|---|
| Location | Marlborough, MA, USA, Austin, TX, USA, Santa Clara, CA, USA, Hillsboro, OR, USA, Folsom, CA, USA, Fort Collins, CO, USA, Phoenix, AZ, USA |
| Salary | $139710 – $197230 |
| Type | Full-Time |
| Degrees | Bachelor’s, Master’s |
| Experience Level | Mid Level, Senior |
Requirements
- Bachelor’s degree in Electrical/Computer Engineering, Computer Science or related major with 3+ years experience -OR- Master’s degree in Electrical/Computer Engineering, Computer Science or related major with 2+ years’ experience.
- 2+ years’ experience driving new initiatives, leading on-time technical deliverables, tracking and execution resulting in successful enablement of CAD flows for product tape-outs.
- 2+ years’ experience in backend flow design and implementation using Synopsys or Cadence tools, debug, support.
- 2+ years’ experience scripting (such as TCL/Perl/Python).
- 2+ years’ experience developing and delivering backend EDA tool/CAD design flows and methodologies with at least two generations of modern process node experience (3nm, 5nm, 7nm).
Responsibilities
- Delivering world-class Tools, Flows and Methodologies (TFM) to Intel’s IP, Core, and SoC product design teams.
- Performing Power/Performance/Area trade-off exploration and analysis.
- Enabling leading edge process technologies on Intel and external foundries.
- Enhancing design team productivity by increasing throughput, reducing iterations, and enabling larger and larger blocks.
- Working on cutting edge technologies such as Machine Learning / AI and Cloud.
Preferred Qualifications
- Master’s or PHD degree in Electrical/Computer Engineering, Computer Science or related major with 4+ years’ experience.
- Good depth and breadth of understanding of logic design concepts, floorplan, structural design, clocking, layout, extraction and timing aspects of complex digital designs.
- Prior experience in technical leadership in execution of complex SOCs would be a plus.
- Direct hands-on experience in one or more of the following areas: Machine Learning (ML) and/or Artificial Intelligence (AI). (Synopsys DSO, Cadence Cerebrus)
- EDA/CAD vendor tools (Synopsys (PrimeTime, Fusion Compiler), Cadence tools (Innovus, Genus, Tempus)
- Design creation/convergence, Sign Off, and Closure Flows (Extraction, Timing, Power, Noise, ERC, RV, and Formal Equivalence)
- Circuit design and process technology.