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Emulation and Silicon Validation Engineer
| Company | Broadcom Limited |
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| Location | San Jose, CA, USA |
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| Salary | $81000 – $130000 |
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| Type | Full-Time |
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| Degrees | Bachelor’s |
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| Experience Level | Mid Level |
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Requirements
- Bachelor’s + 2+ years of related experience required
- Experience with C/C++ DPI Transactors
- SystemVerilog assertions
- Coverage metrics
- Hands-on experience with IXIA/Spirent traffic generators
- Strong understanding of networking protocols and RFC test suites
- Familiarity with communication/interface protocols like PCIe, SPI, and JTAG
Responsibilities
- Conduct detailed studies of chip architecture and micro-architecture to define, develop, and execute comprehensive test plans that thoroughly validate switch features in both emulation phase and post-silicon
- Develop system-level tests using Tcl, ITcl, Python, C/C++ to verify networking switch chips and systems
- Synthesize Verilog RTL and build models for emulation platforms such as Zebu or Palladium
- Perform chip/system-level debugging and root cause analysis for hardware and software issues, effectively addressing Pre/Post Silicon issues and challenges
- Develop and optimize automation scripts and emulation methodologies to enhance efficiency, reusability, and value
- Create reusable synthesizable design blocks, libraries, and verification components to streamline emulation processes
- Plan, organize, and execute silicon bring-up and test plans
- Create and maintain robust emulation and post-silicon validation environments, supporting a global user community
- Collaborate with Architecture, Micro-Architecture, Design, DV, Software, and other teams to achieve thorough emulation coverage and smooth project execution
Preferred Qualifications
No preferred qualifications provided.
