EVA DV Engineer – Video Systems, HW Architecture
| Company | Qualcomm |
|---|---|
| Location | San Diego, CA, USA |
| Salary | $122500 – $183700 |
| Type | Full-Time |
| Degrees | Bachelor’s, Master’s, PhD |
| Experience Level | Junior, Mid Level |
Requirements
- Bachelor’s degree in Computer or Electrical Engineering, Computer Science, or related field and 2+ years of Software Engineering, Hardware Engineering, Systems Engineering, or related work experience.
- OR Master’s degree in Computer or Electrical Engineering, Computer Science, or related field and 1+ year of Software Engineering, Hardware Engineering, Systems Engineering, or related work experience.
- OR PhD in Computer or Electrical Engineering, Computer Science, or related field.
- Strong working knowledge of HVLs: System Verilog, OO programming, Verilog, C/C++, Tcl/Perl/python/shell-scripting.
- Experience with OVM/UVM methodology.
- Strong working experience in coverage driven constraint random verification.
Responsibilities
- Understand the expected functionality of multimedia designs, specifically computer vision hardware IP and subsystem.
- Work with architects of multimedia systems, multimedia ASIC designers, and software engineers to plan and execute verification and validation of multimedia subsystems for integration into SoCs for mobile applications.
Preferred Qualifications
- Experience in developing the Models for verification & synthesizable models for emulation in Verilog/SV.
- Experience in formal verification is a plus.
- Experience in building simulation acceleration environment is a plus.
- Prior experience in multimedia HW accelerator verification is a plus.