Firmware and Modeling Integration Engineering Manager
Company | Intel |
---|---|
Location | Austin, TX, USA, Santa Clara, CA, USA, Hillsboro, OR, USA, Folsom, CA, USA, Phoenix, AZ, USA |
Salary | $196830 – $277880 |
Type | Full-Time |
Degrees | Bachelor’s, Master’s |
Experience Level | Expert or higher |
Requirements
- Bachelor’s degree or Masters in Computer Science, Computer Engineering, Electrical Engineering, or equivalent
- 10+ years of industry experience in firmware and/or silicon model development and/or validation in support of successfully deployed products.
- 3+ years of Engineering Management experience
Responsibilities
- Lead, coach and build a collaborative, inclusive and high-performing team where members are set up to be successful and grow.
- Lead the development and validation of the integration of Firmware for IPs and custom design modules into an SOC.
- Lead the development and validation of functional model integration into larger components in various pre-si environments.
- Drive industry leading software practices across various areas including continuous integration, debug infrastructure, bug tracking, and other software engineering infrastructure.
- Manage delivery of firmware products and drive execution alignment with cross-functional teams, partner organizations, and external customers.
- As a member of the leadership team, you will need to collaborate across multiple disciplines and organizations to effectively influence product direction.
Preferred Qualifications
- Extensive experience in working with cross functional Platform, SoC, and/or IP teams including Architecture, Design, Firmware, and Validation in the development, validation or program management of high-volume production silicon or board-level products.
- Experience working with validation practices in different environments, simulation, emulation and virtual prototype.
- Software development in C, C++, Rust, SystemC, Python and/or Domain Specific Language modeling
- Deep understanding of processors, servers, system software architecture, and associated Power and Performance modelling techniques
- Detailed SoC Architecture, SoC Subsystem Architecture, IP Architecture and/or Microarchitecture knowledge