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HSIO Functional and Power Management Engineer
| Company | NVIDIA |
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| Location | Santa Clara, CA, USA |
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| Salary | $168000 – $310500 |
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| Type | Full-Time |
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| Degrees | Bachelor’s, Master’s |
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| Experience Level | Senior, Expert or higher |
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Requirements
- BS or MS degree in EE/CE or equivalent experience
- 8+ years working in HSIO development, bringup planning, HSIO functional and electrical validation, and/or power optimization
- Effective in a collaborative environment
- Strong EE fundamentals, knowledgeable in computer architecture, high speed interfaces, timing analysis, process variations, statistical error rates and power analysis
Responsibilities
- Contribute to design of next generation of high-speed IOs, including NVLink and NVLink-C2C
- Responsible for IO power optimizations and continuing to push energy efficiency
- Ensure interoperability with connected devices and system components in complex interconnect topologies
- Deep dive into technically challenging HSIO bugs and help drive debug efforts across various teams
- Work closely with other engineering teams such as system architects, mixed signal and design, DGX, software/firmware, HW/SW QA, operations and AE teams to drive design, development, debug and release of next generations products.
Preferred Qualifications
- Working experience in HSIOs like PCIE or chip-to-chip interconnects including understanding of process/temp/voltage sensitivity on BER
- Identifying full chip data paths for HSIO saturation and working with applications to stress test for stability, perf, and power
- System level and interconnect power management optimizations
- Experience with large scale Data Center topologies across hosts, switches, retimers and end points
- Understanding of firmware/driver structures and their interaction with HW
