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Memory Circuit Design Engineer
Company | Broadcom Limited |
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Location | Irvine, CA, USA |
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Salary | $73000 – $117000 |
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Type | Full-Time |
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Degrees | |
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Experience Level | Junior, Mid Level |
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Requirements
- Working Knowledge of Common memory types such as SRAM, RF, ROM and familiarity with CMOS digital circuits
- Good understanding of transistor level circuit behavior and device physics
- Knowledge of signal integrity, EM/IR, and reliability issues
- Understanding of memory behavioral and physical models is a plus
- Understanding of DFT schemes and chip level integration is a plus
- Familiarity with test setups, silicon testing and debug is a plus
- Comfortable in running simulators, writing automation scripts, and are tools savvy
- Good communication, interpersonal, and leadership skills
- Motivated, self-driven and good at multi-tasking
Responsibilities
- Analyze different memory architectures and highlight the tradeoffs
- Design and build memory or circuit blocks at the gate or transistor level
- Simulate and analyze the circuit design using transistor level simulators
- Extract the layout and perform post-layout simulations and verification
- Floorplan physical implementation and leafcell layout integration to build the physical macro
- Integrate characterization flow to extract timing and power information
- Develop scripts to automate characterization flow, simulations, and verification
- Specify and verify various behavioral and physical memory models
- Document the design specifications, behavioral description, and timing diagrams
- Specify silicon test plan and correlate silicon to simulation data
- Help debug silicon issues
Preferred Qualifications
- Understanding of memory behavioral and physical models is a plus
- Understanding of DFT schemes and chip level integration is a plus
- Familiarity with test setups, silicon testing and debug is a plus