Mixed Signal Design Verification Engineer

Mixed Signal Design Verification Engineer

Requirements

• The candidate must have a bachelors or graduate degree in Electrical or Computer Engineering
• 3+ years’ of experience in RTL logic design and micro architecture experience
• 3+ years’ of experience in power management hardware and firmware design/support
• 2+ years’ experience with test-benches, simulation, validation and modeling theory is a plus
• 2+ years’ experience with C and perl programming skills are plus

Responsibilities

• Performs functional verification of IP logic to ensure design will meet specification requirements. Develops IP verification plans, test benches, and the verification environment to ensure coverage to confirm to microarchitecture specifications.
• Executes verification plans and defines and runs system simulation models to verify the design, analyze power and timing, and uncover bugs.
• Replicates, root causes, and debugs issues in the presilicon environment. Finds and implements corrective measures to resolve failing tests.
• Collaborates with architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features.
• Documents test plans and drive technical reviews of plans and proofs with design and architecture teams.
• Maintains and improves existing functional verification infrastructure and methodology.
• Participates in the definition of verification infrastructure and related TFMs needed for functional design verification.
• Strong written and verbal communication skills

Preferred Qualifications

• Knowledge and fundamentals in Logic design, computer architecture and VLSI design concepts
• Knowledge in system verilog language and other simulation tools like VCS
• 3+ years of power management hardware and firmware design/support