Physical Design Engineer – Tpu
| Company | |
|---|---|
| Location | Sunnyvale, CA, USA |
| Salary | $156000 – $229000 |
| Type | Full-Time |
| Degrees | Bachelor’s, Master’s, PhD |
| Experience Level | Senior, Expert or higher |
Requirements
- Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
- 7 years of physical design experience with industry-standard tools, languages, and methodologies relevant to the development of silicon-based ICs and chips.
- Experience in logic synthesis, PnR, timing closure, and static timing analysis.
Responsibilities
- Drive the physical implementation of complex ASICs in advanced technology nodes at floorplan block, subsystem, and chip levels.
- Oversee physical design of internal IPs and third-party IPs, including digital logic, I/Os, analog PHYs, etc.
- Setup and/or review constraints for synthesis, STA, CDC, and RDC.
- Plan/review floorplan and provide feedback.
- Set up PD flows, participate in co-design. Be a liaison between internal design teams and external vendors, track PD progress via checklists and help resolve PD issues.
Preferred Qualifications
- Master’s degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
- Experience managing external vendors.
- Experience with compute cores, high-speed memory technologies, silicon interposer design and advanced packaging technologies.
- Experience crafting physical design automation flows.