Pre-Silicon SoC Validation Engineer

Pre-Silicon SoC Validation Engineer

Requirements

• Must have a BS in Computer Science, Computer Engineering or Electrical Engineering plus 4+ years of experience OR an MS plus 2+ years of experience
• 2+ years experience with reading and interpreting technical specs and Register Transfer Level (RTL) code.
• 2+ years experience with validation or testing experience, especially in a silicon design team.
• 2+ years experience with UNIX or Linux.

Responsibilities

• Adding support for and debugging new features/IPs into existing emulation models
• Learning the architecture and microarchitecture by debugging failures to the root cause
• Developing high level (for example, C++/Python) modeling for RTL components
• Developing and utilizing various debug and validation tools and/or methodologies to implement validation plans with the goal being to ensure a solid design
• Building multiple emulation targets for an SoC
• Participating in the debug of failures on silicon and developing new testing strategies to detect these failures on RTL models
• System level validation tasks such as using evaluation boards and FPGAs

Preferred Qualifications

• 2+years experience with IA-32 assembly and/or Verilog programming experience
• 2+years experience writing BFMs