Senior Custom ASIC Engineering Lead
| Company | Broadcom Limited |
|---|---|
| Location | San Jose, CA, USA, Irvine, CA, USA, Fort Collins, CO, USA, Chandler, AZ, USA |
| Salary | $107000 – $190000 |
| Type | Full-Time |
| Degrees | |
| Experience Level | Senior |
Requirements
- Multiple tape-outs in advanced technology nodes
- Analyze PPA tradeoffs involved amongst various library components, and architectures
- Knowledgeable in low power design and power management
- Hands-on experience in physical design and STA, EDA tools, design flows for physical design, logic simulation, test, and packaging
- Programming in TCL, shell and scripting languages
Responsibilities
- Manage external customer ASIC programs from inception to finish, including RFQs, technology and IP collaterals, design, test, packaging, fabrication, bring-up and production
- Advise customers on best practices in EDA, flows and design methodologies, and by organizing Q&A sessions with Broadcom technology experts
- See ahead, plan ahead, work ahead. Proactively assess potential risks to the design quality, project schedule, then work with cross-functional teams to prepare and execute risk mitigation actions
- Execute physical design flows to check that incoming customer tape-in netlists meet Broadcom’s stringent tape-out quality standards
- Motivate and drive yourself to stay abreast of developments in Broadcom IPs, technology and end user applications
- Participate in discussions about your chips with marketing, sales, legal and regulatory compliance teams
- Be a consummate team player and assist other teams in need
Preferred Qualifications
- Exposure to SERDES communications protocols
- Logic design, chip architecture, microarchitecture, Verilog RTL coding Front-end logic design verification, DRC, logic synthesis
- Knowledge of DFT methods including scan, memory BIST and repair