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Senior RTL Analysis Methodology Engineer
| Company | NVIDIA |
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| Location | Santa Clara, CA, USA |
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| Salary | $136000 – $264500 |
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| Type | Full-Time |
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| Degrees | Bachelor’s, Master’s |
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| Experience Level | Senior |
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Requirements
- BS or MS in Electrical Engineering, Computer Engineering, or related fields (or equivalent experience). BS with 6+ years, or MS with 4+ years of experience in RTL analysis, RTL design, and verification.
- Deep understanding of static sign-off technologies CDC, RDC and Formal.
- Proficiency in one or more scripting languages (eg: Perl, Python, Tcl) and Make.
- Proficiency in Verilog SystemVerilog HDL.
- Excellent problem solving and debugging skills.
- Strong interpersonal and collaboration skills are required.
Responsibilities
- You will be part of NVIDIA’s RTL analysis CAD team, responsible for developing flows, methodology, and application support for Clock Domain Crossing(CDC), Reset Domain Crossing(RDC).
- Employ good software engineering practices to develop leading-edge CAD flow for EDA tools like (but not limited to) Meridian.
- Evaluate, deploy, and support state-of-the-art EDA tools and methodologies for RTL analysis.
- Serve as an in-house EDA tools specialist. Act as liaison between designers and EDA vendors. Analyze issues, build solutions or workarounds, and provide test cases to EDA vendors.
- Invent new methodologies to improve coverage and user efficiency by employing new tools, and automation including AI.
- Write technical documents and train internal users.
- Set up and maintain flow regressions and QA.
- Employ data collection, analysis, and reporting tools to acquire methodology insights.
Preferred Qualifications
- Hands-on experience with commercially available RTL analysis tools like Meridian CDC/RDC, Spyglass CDC, or VC CDC.
- Hands-on experience in digital design of asynchronous interfaces.
- Familiarity with Machine Learning/Deep Learning.
