Senior Staff Engineer – SoC Integration

Senior Staff Engineer – SoC Integration

Requirements

• BE (MS preferred) in Computer/Electrical Engineering or Computer Science with 15+ years working experiences.
• Hands on knowledge & experience in ASIC design flow from design to tape out.
• Experience in the commercial IPs such as UCIe, CPU, Ethernet, and DDR interfaces.
• Good understanding of PPA (performance, power, and area) trade-offs.
• Experience in SoC level synthesis, timing analysis, lint check, CDC checks.
• Good knowledge and experience in AMBA bus fabric, ARM cores.
• Self-motivated problem-solver with an ability to work well in a team.
• You’re inclusive, adapting your style to the situation and diverse global norms of our people.
• An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding.
• You’re collaborative, building relationships, humbly offering support and openly welcoming approaches.
• Innovative and creative, you proactively explore new ideas and adapt quickly to change.

Responsibilities

• Own the integration of SoCs with multiple high speed interfaces.
• Reviews 3rd party IPs including ARM cores, DDR controller, and UCIe PHY and controllers.
• Responsible for integrating the third part IPs with system bus, peripherals and CPU cores.
• Work closely with architects and verification engineers to ensure sound design at SoC level.
• Work with physical designers on timing constraints, synthesis, DFT insertion, and static timing analysis.

Preferred Qualifications

• Experience multiple tape outs of SoCs with high speed interfaces and ARM cores.
• Experience in communicating with IP & design service companies.
• Experience in designing interconnect fabrics like ARM NIC and/or NOC.
• Highly motivated with good verbal and written communication skills.
• Creativity in problem solving.