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Signal Integrity Engineer – Systems Engineering

Signal Integrity Engineer – Systems Engineering

CompanyQualcomm
LocationSanta Clara, CA, USA
Salary$192600 – $330400
TypeFull-Time
DegreesMaster’s
Experience LevelSenior, Expert or higher

Requirements

  • Master’s degree in Electrical or Computer Engineering, with a specialization in Signal Integrity (SI).
  • 6+ years of experience in SI analysis, simulation, and measurement of high-speed digital systems.
  • Strong knowledge of SI fundamentals, including power distribution networks (PDN), EMIR, transmission line theory, crosstalk, S-parameters, and channel simulations.
  • Expertise in DDR5/LPDDR5X JEDEC specifications and/or SerDes standards (PCIe, CXL, USB, Ethernet, etc.).
  • Experience in developing SI methodologies from die to system, with lab correlation and validation.
  • Proficiency with 2D/2.5D/3D EM simulation tools such as ANSYS HFSS, Cadence Sigrity, Dassault Systèmes CST, Keysight ADS, and Synopsys’ HSPICE.
  • Hands-on experience creating complex SI models and performing both frequency and time-domain simulations.
  • Proficiency in Unix/Linux environments and experience with EDA tools through scripting.
  • Strong knowledge of packaging and PCB technologies, design, and manufacturing processes.
  • Familiarity with 2.5D/3D packaging technologies, such as CoWoS, InFo, EMIB, and RDL.
  • Hands-on experience with electrical validation and compliance testing using tools like VNAs, oscilloscopes, spectrum analyzers, PCIe/I2C analyzers, traffic generators, TDR, and differential probes.
  • Proven ability to work independently and collaboratively within a cross-functional team environment.
  • Strong technical documentation skills and excellent written and verbal communication.

Responsibilities

  • Collaborate with SoC, applications engineering, packaging, and system design teams to define and implement system interconnects that meet the unique demands of high-end server environments.
  • Provide guidelines and feedback on silicon timing, bump/RDL, package pinout and PCB specifications.
  • Develop customer guidelines and define module interfaces/formats for simulation.
  • Lead the creation of server-grade SI models, simulations, and final designs.
  • Perform early SI analysis on 2.5D/3D structures and establish design guidelines.
  • Update and automate design and analysis flows.
  • Prepare and present technical documentation and reports to stakeholders, including engineering teams, senior management, customers, and suppliers.

Preferred Qualifications

  • Ph.D. in Electrical or Computer Engineering, specializing in SI.
  • 10+ years of experience in SI analysis, simulation, and measurement of high-speed digital systems.
  • In-depth understanding of computational electromagnetics and transmission line theory.
  • Proficiency in DDR5 and LPDDR5X timing budgets, jitter analysis, and PHY design/link analysis.
  • Experience with SI simulation for PCIe Gen6+, multi-gigabit serial buses (112Gbps+), UCIE, etc.
  • Experience with package and PCB design tools such as Cadence Allegro.
  • Proficiency in scripting with MATLAB, Perl, and Python.