SoC NPU Architect
| Company | Samsung Research America |
|---|---|
| Location | Mountain View, CA, USA |
| Salary | $188400 – $282450 |
| Type | Full-Time |
| Degrees | Bachelor’s, Master’s, PhD |
| Experience Level | Senior, Expert or higher |
Requirements
- Bachelor’s degree in Electrical, Computer Science, related Science or equivalent combination of education, training and experience
- 15+ years of experience, or Master’s degree with 13+ years of experience, or PhD with 10+ years or working experience in NPU architecture & development
- Good knowledge and experience in architecture/design of NPUs
- Good knowledge in CNN and Transformer Network with hands on experience on LLM/LVM
- Well versed in processor architecture like ARM and RISC-V
- Experience in ML frameworks (TensorFlow, PyTorch, ONNX)
- Good knowledge in ML compilers
- Experience in micro architecture of SoC, interface subsystems, logic modules
- Experience in complex logic designs and timing closure on large, sophisticated designs
- Self-motivated problem-solver with an ability to work well in a team
- Inclusive, adapting style to diverse global norms
- Avid learner with curiosity and resilience
- Collaborative, building relationships and offering support
- Innovative and creative, exploring innovative ideas and adapting quickly to change
- Proficient programming skills in Python and/or C++
Responsibilities
- Analyze the state-of-the-art AI algorithms including camera and Gen AI use cases (LLM and LVM)
- Drive architectural definition of NPUs for mobile AI applications
- Create NPU simulator to simulate real NPU
- Map Gen AI use cases to NPU and NPU simulator with compiler concept in mind to find the bottlenecks of NPU
- Optimize and co-design of SW and HW to develop new architectures for low power and high performance
- Lead PPA (power, performance, and area) tradeoff analysis to achieve requirements
- Work closely with AI use case developers and NPU compiler and software architects to come up with optimized architectural solutions
- Support the development of NPUs to make sure new NPU architecture succeed
- Work closely with design verification team for debug, to meet code and functional coverage targets
Preferred Qualifications
- Experience in AI use case development and deployment (training, quantization, deployment)
- Experience in modeling for performance/power estimates using SystemC, Platform Architect, ModelSim, RTL or similar tools/expertise
- Experience in CPU, GPU, DSP, DRAM and interconnect IPs
- Good knowledge in ASIC design flow
- Highly motivated with good verbal and written communication skills
- Creativity in problem solving