SoC Post-silicon Debug and Functional Validation Engineer

SoC Post-silicon Debug and Functional Validation Engineer

Requirements

• Bachelor’s (3+ years’ experience) or master’s degree (1+ years’ experience) in electrical engineering, Computer Engineering, Computer Science or related field.
• 1+ years of experience hands-on experience in post-silicon validation, pre-silicon verification or Microarchitecture, particularly in CPU, SOC, or chipset domains.
• 1+ years of experience with debug tools (JTAG, Verdi), lab equipment (e.g., logic analyzers, oscilloscopes), and debugging techniques.
• 1+ years of experience in scripting and programming languages (e.g., Python, C/C++, or Perl) to develop validation tools and frameworks.

Responsibilities

• Develop and execute validation plans to verify CPU/SOC functionality, Power and thermal management across multiple silicon platforms.
• Design, implement, and debug validation tests and methodologies for post-silicon environments.
• Collaborate with cross-functional teams, including design, firmware, software, and manufacturing, to identify and resolve issues.
• Analyze and debug CPU/SOC and system-level issues using advanced tools and methodologies.
• Lead debug task forces to root-cause and resolve issues impacting program milestones.
• Mentor junior validation engineers to aid in their technical development.
• Drive validation automation, coverage improvement, and process efficiency for validation execution.
• Work with internal stakeholders to ensure smooth integration and delivery of products to the market.

Preferred Qualifications

• Candidates with advanced degrees and 5+ years’ experience encouraged to apply.
• Experience with power management, graphics, AI, and multimedia.
• Familiarity with power and performance testing methodologies is plus.
• Experience with Intel architecture, silicon bring-up, and validation flow.
• Windows debug tools such as Windbg, Event trace analysis.
• Knowledge of firmware and software interaction with hardware.