SoC Verification Engineer
| Company | Solidigm |
|---|---|
| Location | Vancouver, BC, Canada |
| Salary | $Not Provided – $Not Provided |
| Type | Full-Time |
| Degrees | Bachelor’s |
| Experience Level | Junior |
Requirements
- Linux experience
- Languages: C, C++, Python, Java, Verilog (or VHDL), SystemVerilog
- Verification methodologies: UVM, Formal Property Verification
- Object-oriented programming experience
- Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent
Responsibilities
- Create test and execution plans, ensuring that Solidigm’s products will be successful
- Use industry-standard methodologies such as UVM, embedded C-based FW co-simulation, and formal property verification
- Continuously investigate new tools and technologies
Preferred Qualifications
- 1+ year related/relevant experience (including internships)
- Familiarity with performing functional verification
- Advanced degree in Computer Science, Computer Engineering, Applied Science, etc.
- Prior experience with storage products, or PCIe, NVMe, NAND protocols
- Experience using Atlassian tools (Jira, Confluence, etc.) to track and manage project execution